Device properties
< Maximum number of threads per block
< Maximum block dimension X
< Maximum block dimension Y
< Maximum block dimension Z
< Maximum grid dimension X
< Maximum grid dimension Y
< Maximum grid dimension Z
< Maximum shared memory available per block in bytes
< Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK
< Memory available on device for __constant__ variables in a CUDA C kernel in bytes
< Warp size in threads
< Maximum pitch in bytes allowed by memory copies
< Maximum number of 32-bit registers available per block
< Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK
< Typical clock frequency in kilohertz
< Alignment requirement for textures
< Device can possibly copy memory and execute a kernel concurrently. Deprecated. Use instead CU_DEVICE_ATTRIBUTE_ASYNC_ENGINE_COUNT.
< Number of multiprocessors on device
< Specifies whether there is a run time limit on kernels
< Device is integrated with host memory
< Device can map host memory into CUDA address space
< Compute mode (See ::CUcomputemode for details)
< Maximum 1D texture width
< Maximum 2D texture width
< Maximum 2D texture height
< Maximum 3D texture width
< Maximum 3D texture height
< Maximum 3D texture depth
< Maximum 2D layered texture width
< Maximum 2D layered texture height
< Maximum layers in a 2D layered texture
< Deprecated, use CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_WIDTH
< Deprecated, use CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_HEIGHT
< Deprecated, use CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_LAYERS
< Alignment requirement for surfaces
< Device can possibly execute multiple kernels concurrently
< Device has ECC support enabled
< PCI bus ID of the device
< PCI device ID of the device
< Device is using TCC driver model
< Peak memory clock frequency in kilohertz
< Global memory bus width in bits
< Size of L2 cache in bytes
< Maximum resident threads per multiprocessor
< Number of asynchronous engines
< Device shares a unified address space with the host
< Maximum 1D layered texture width
< Maximum layers in a 1D layered texture
< Deprecated, do not use.
< Maximum 2D texture width if CUDA_ARRAY3D_TEXTURE_GATHER is set
< Maximum 2D texture height if CUDA_ARRAY3D_TEXTURE_GATHER is set
< Alternate maximum 3D texture width
< Alternate maximum 3D texture height
< Alternate maximum 3D texture depth
< PCI domain ID of the device
< Pitch alignment requirement for textures
< Maximum cubemap texture width/height
< Maximum cubemap layered texture width/height
< Maximum layers in a cubemap layered texture
< Maximum 1D surface width
< Maximum 2D surface width
< Maximum 2D surface height
< Maximum 3D surface width
< Maximum 3D surface height
< Maximum 3D surface depth
< Maximum 1D layered surface width
< Maximum layers in a 1D layered surface
< Maximum 2D layered surface width
< Maximum 2D layered surface height
< Maximum layers in a 2D layered surface
< Maximum cubemap surface width
< Maximum cubemap layered surface width
< Maximum layers in a cubemap layered surface
< Maximum 1D linear texture width
< Maximum 2D linear texture width
< Maximum 2D linear texture height
< Maximum 2D linear texture pitch in bytes
< Maximum mipmapped 2D texture width
< Maximum mipmapped 2D texture height
< Major compute capability version number
< Minor compute capability version number
< Maximum mipmapped 1D texture width
< Device supports stream priorities
< Device supports caching globals in L1
< Device supports caching locals in L1
< Maximum shared memory available per multiprocessor in bytes
< Maximum number of 32-bit registers available per multiprocessor
< Device can allocate managed memory on this system
< Device is on a multi-GPU board
< Unique id for a group of devices on the same multi-GPU board
See Implementation
Device properties